Complex oxides for use in semiconductor devices and related methods

ABSTRACT

A semiconductor device includes a semiconductor substrate, a first oxide layer on the semiconductor substrate including an element from the semiconductor substrate, and a second oxide layer on the first oxide layer opposite the semiconductor substrate. The second oxide layer includes a stoichiometric, single-phase complex oxide represented by the formula: 
 
A h B j O k , or equivalently (A m O n ) a (B q O r ) b  
         in which the elemental oxide components, (A m O n ) and (B q O r ) are combined so that h=j or, equivalently, ma=bq, and a, b, h, j, k, m, n, q and r are non-zero integers; and wherein: A is an element of the lanthanide rare earth elements of the periodic table or the trivalent elements from cerium to lutetium; and B is an element of the transition metal elements of groups IIIB, IVB or VB of the periodic table.

FIELD OF THE INVENTION

The invention generally relates to oxides that may be used inconjunction with integrated circuit devices, e.g., field effecttransistors and high electron mobility transistors, as well as otherdevices including photovoltaics, and methods of making the same.

BACKGROUND OF THE INVENTION

Insulated gate field effect transistors (IGFETs) typically include achannel region in which current is controlled through the application ofan electrical bias to a gate electrode that is separated from thechannel region by a thin insulating film or gate dielectric. Currentthrough the channel is supplied and collected by source and draincontacts, respectively, to the channel region. As semiconductor devicesbecome increasingly miniaturized, gate dielectrics having a reducedequivalent oxide thickness (EOT) may be desirable. For example, theSemiconductor Industry Association (SIA) National Technology Roadmap forSemiconductors (NTRS) has projected that gate dielectrics with an EOTbelow 1 nm may be desirable for uses such as in advanced complementarymetal-semiconductor oxide field-effect transistor (CMOS FET) deviceshaving channel lengths scaled to below 50 nm. However, reduced EOTdielectrics may exhibit tunneling and current leakage. For example,tunneling of conventional materials such as SiO₂ may exceed 1-5 A/cm² atapplied gate bias levels of about 1 V above threshold for an EOT of lessthan 1.4 nm.

One possible approach for decreasing EOT without increasing directtunneling leakage current may involve substituting alternative oxideswith dielectric constants (K) that could exceed that of SiO₂. Silicondioxide has a dielectric constant of approximately 3.9. For example, itmay be desirable to obtain oxides with dielectric constants ranging fromapproximately 10 to more than 30. However, dielectric materials withhigher vales of K generally tend to have relatively small band gaps,which can also contribute to undesirable tunneling leakage current insemiconductor devices despite a relatively high dielectric constant.

Silicon nitride and silicon oxynitride alloys have been proposed asdielectric materials. Silicon nitride and silicone oxynitride alloyshave dielectric constants of approximately 7.6 and 5.5 to 6.0respectively. For example, C. J. Parker, G. Lucovsky and J. R. Hauser,IEEE Electron. Device Lett. (1998); Y. Wu and G. Lucovsky, IEEEElectron. Device Lett. (1998); and H. Yang and G. Lucovsky, IEDM Digest,(1999) propose oxide-nitride and oxide-oxynitride alloy stackeddielectrics with EOT projected to be greater than about 1.1 nm beforetunneling leakage at approximately 1 V is increased above 1-5 A/cm². Thepreparation of these stacked dielectrics proposes two 300° C. remoteplasma process steps: i) plasma-assisted oxidation to form Si—SiO₂interface layers ranging in thickness from about 0.5 to 0.6 nm, and ii)remote plasma-enhanced chemical vapor deposition (RPECVD) to depositeither a nitride or an oxynitride (e.g., (SiO₂)_(x)(Si₃N₄)_(1-x) withx˜0.5) dielectric film in the dielectric stack. After deposition, a lowthermal budget, e.g., 30 second, 900° C., rapid thermal anneal (RTA) hasbeen proposed in an attempt to achieve chemical and structuralrelaxation. This RTA may promote optimized performance in IGFET devices[G. Lucovsky, A. Banerjee, B. Hinds, G. Claflin, K. Koh and H. Yang, J.Vac. Sci. Technol. B15, 1074 (1997)]. Stacked nitride and oxynitridegate dielectrics may display improved performance and reliability withrespect to thermally-grown oxides of the same EOT. Nonetheless, thesegate dielectrics typically have EOT of greater than 1.1 nm in order toattempt to maintain direct tunneling leakage below 1 A/cm². The nitrideand oxynitride layers of these devices may be sufficiently thick tominimize or stop boron out-diffusion out of p⁺ polycrystalline Si gateelectrodes in the p-channel IGFETs [Y. Wu, et al., Vac. Sci. Technol.B17 1813 (1999)].

Other high-K dielectrics have been proposed (e.g., a K greater than 8)including TiO₂ [J. Yan, D. C. Gilmer, S. A. Campbell, W. L. Gladfelterand P. G. Schmid, J. Vac. Sci. Technol. B 14, 1706 (1996).], Ta₂O₅ [H.Shinrike and M. Nakata, IEEE Trans. on Elec. Devices 38, 544 (1991)],Al₂O₃ [L. Manchanda, W. H. Lee, J. E. Bower, F. H. Baumann, W. L. Brown,et al., IEDM Tech. Dig., p. 605 (1998)], ZrO₂, [R. B. van Dover, et al.,IEEE Electron Device Lett., 19, 329, (1998)] and Zr(Hf)O₂—SiO₂ (alsodesignated as Zr(Hf)-silicates; see van Dover et al.). These materialsmay not demonstrate the targeted goals of capacitance with decreasedtunneling or leakage currents that may be desirable for silicon CMOSdevices. For example, these materials may exhibit tunneling or leakagecurrents in CMOS devices with EOT less than 1 nm. The performance of thematerials may be limited due to the oxidation of the silicon substratethat can occur during thermal chemical vapor deposition (CVD) or duringpost-deposition processing, such as, for example, thermal anneals, tofully oxidize the deposited thin films.

Another high-K dielectric is non-crystalline Al₂O₃. The dielectricconstant of Al₂O₃ is generally about nine or less, but Al₂O₃ has a bandgap of more than 7 eV and conduction and valence band offset energiesgreater than 2 eV. However, because of its increased bond-ionicity withrespect to SiO₂ (Lucovsky, JVST), non-crystalline Al₂O₃ dielectric filmsmay display a high value of interfacial fixed negative charge, e.g.,greater than 10¹² cm⁻², as compared to less than 10¹¹ cm⁻² for SiO₂dielectrics, at interfaces with Si, or at interfaces with superficiallythin (<0.5-1.0 nm) non-crystalline SiO₂ in contact with Si. This highvalue of fixed charge has been correlated with electron and holemobility degradation in the channel of IGFET devices and can potentiallycontribute to a reduction in the dimensionally-scaled drive current byfactors of two or more. Accordingly, the gains in device capacitancederived from the increased value of K may be diminished.

Other relatively high-K materials include transition metal and rareearth elemental oxides. These dielectrics may be qualitatively differentthan non-crystalline SiO₂ and Al₂O₃ in as much as the lowest conductionband states may be associated with localized atomic d-states of therespectively transition metal and rare earth atoms in contrast to thedelocalized or extended s-state conduction band edge states ofnon-crystalline SiO₂, Al₂O₃ and the like. A comparison of an electronicstructure diagram of the conduction band edge states of non-crystallineSiO₂ and a metal or rare earth oxide is shown in FIG. 1. Excitations tothese states may show strong final state effects. Moreover, the lowestconduction band states may display a linear scaling of the optical bandgap (i.e., the energy associated with the generation of a electron-holepair created by absorption of a photon) with the atomic d-state energyin a configuration appropriate to bonding to oxygen atoms in adielectric. For dielectric applications, this configuration is generallydesignated as S²d^(n-2), where n is total number of valence electrons.For example, n is 3 for the group IIIB transition metal atoms, and thelanthanide rare earth atoms, 4 for the group IVB transition metal atoms,and 5 for the group VB transition metal atoms. This scaling is displayedin FIG. 2, where specific transition metal and rare earth oxides havebeen identified in the diagram. FIG. 2 also includes estimated and/ormeasured values of the conduction band offset energies relative to Si.As noted above, there is also an empirical relationship between the bandgap, E_(g), and the dielectric constant, K, such that E_(g) generallydecreases as K increases. The scaling in FIG. 1 may be validatedexperimentally. Due to these properties, several high-K thin filmdielectrics, including TiO₂, Nb₂O₃ and Ta₂O₃ may perform poorly ifincorporated into silicon MOSFET devices.

There may be other problems in the application of elemental oxides, suchas the transition metal oxides, ZrO₂, HfO₂, Y₂O₃, La₂O₃, and the rareearth oxides (including Gd₂O₃ and the like), into aggressively scaleminiaturized MOSFET devices. The various problems that can beexperienced include i) high values of interfacial fixed charge that aregenerally positive ii) ion and atom transport, iii) high reactivity withambient gases, giving rise to incorporation or water or hydroxyl groups,and iv) lower than anticipated tunneling currents due to reducedelectron masses associated with the electronic structure, e.g., becausethe lowest conduction band has d-state properties. This last effect maybe more apparent in transition metal oxides than in rare earth oxides.Other process integration issues may relate to the combined effects oftheir hydrophyllic nature and oxygen ion transport that can promotechanges in interface bonding during post-deposition thermal processsteps, including dopant activation of atoms in source and drain contactsto the channel in a MOSFET device.

Other high-K dielectric materials include non-crystalline silicate andaluminate alloys, which are generally non-stoichiometric and may notcorrespond to the composition of a particular crystalline phase. Forexample, hafnium silicate and aluminate alloys in the alloy compositionrange from ˜25% to at most 50% HfO₂ have been proposed, as well as Zrsilicate and aluminate alloys. Hafnium silicates may have reducedreactivity with Si substrates and the like. However, one drawback forboth group IVB silicates may be their thermal stability against chemicalphase separation into ZrO₂ or HfO₂, and a relatively low contentsilicate alloy (less than 10% ZrO₂ or HfO₂ as determined by theconcentration of the eutectic in the equilibrium phase diagram), andcrystallization of the ZrO₂ or HfO₂ phase. Thermal instability generallyoccurs at temperatures of ˜900° C. for low ZrO₂ content Zr silicatealloys, and at temperature ˜1000° C. for low HfO₂ content Hf silicates.Less is understood about chemical phase separation in aluminate alloys;however, there is some evidence for crystallization in Hf aluminatealloys. Decreases in K upon alloying with either SiO₂ or Al₂O₃ may besignificant. For example, the Zr and Hf silicate alloys that display thegreatest amount of thermal stability against crystallization havedielectric constants less than 15. Nonetheless, they display reduceddirect tunneling with respect to their respective end-member elementaloxides because of mitigating factors, such as the tunneling effectivemass, that can increase as the transition metal oxide fractionincreases. The precursor bonding states that drive the chemical phaseseparation can be a function of the degree of rigidity orover-constrained bonding in the non-crystalline alloy, particularly inthe composition range of about 25 to 50% ZrO₂ or HfO₂. The increasedrigidity of these alloys relative to non-crystalline SiO₂, and nano- ormicro-crystalline ZrO₂ or HfO₂, is the driving force for the chemicalseparation. The separated state is lower in energy, but also has asignificantly reduced dielectric constant that renders phase separateddielectrics not useful for certain applications. In addition, therigidity of these low ZrO₂/HfO₂ content silicate films may result in i)defects in the bulk of the film that cannot be compensated by hydrogenor deuterium, and leads to electron injection and trapping under biasedconditions, and also ii) defect formation at the semiconductordielectric interfaces, e.g., silicon atom dangling bonds in the strainedsilicon in contact with the dielectric film, and/or a superficially thinregion with predominantly Si—O bonding.

Other potential problems encountered with various high-K dielectrics mayrelate to: (1) the crystallization of the deposited films during eitherdeposition or post-deposition processing, (2) the low dielectricconstants of the bulk films that may be insufficient to meet thetargeted goals, and (3) the formation of interfacial silicon oxides, orlow content silicon oxide alloys (e.g., silicates) that may limit theattainable effective values of the K for the resulting stackeddielectric structure. For example, it is believed that oxidation of thesilicon substrate during deposition or post-deposition processing maymitigate many of the gains of high-K layers with respect to achievablecapacitance, whereas crystallization has the potential to open upalternative conduction pathways, the possibility of anisotropicdielectric constant behavior, and the potential to produce surfaceroughening.

The formation of interfacial silicide bonds may result in undesirableinterfacial defects. Such defects may occur in the form of fixedpositive charge or interface traps. Thus, it may be desirable to employa thin dielectric interface layer of SiO₂ between the dielectric layerand the silicon substrate. Utilizing such interfacial layers with knowninsulating film dielectrics, however, may be disadvantageous in thatthey may limit the dielectric stacks from having sufficient capacitanceto meet the ever-increasing scaling demands of CMOS devices.Additionally, this use of interfacial layers may also limit theincorporation of high-K oxides into devices that employ semiconductorsubstrates other than silicon such as, for example, silicon carbide,gallium nitride and compound semiconductors such as SiC, GaN, (Al,Ga)N,GaAs, (Al,Ga)As, (In,Ga)As, GaSb, (Al,Ga)Sb, (In,Ga)Sb, as well asnitride, arsenide and antimonide quaternary III-V alloys.

SUMMARY

According to embodiments of the present invention, a semiconductordevice includes a semiconductor substrate, a first oxide layer on thesemiconductor substrate including an element from the semiconductorsubstrate, and a second oxide layer on the first oxide layer oppositethe semiconductor substrate. The second oxide layer includes astoichiometric, single-phase complex oxide represented by the formula:A_(h)B_(j)O_(k), or equivalently (A_(m)O_(n))_(a)(B_(q)O_(r))_(b)

in which the elemental oxide components, (A_(m)O_(n)) and (B_(q)O_(r))are combined so that h=j or, equivalently, ma=bq, and a, b, h, j, k, m,n, q and r are non-zero integers; and

wherein:

A is an element of the lanthanide rare earth elements of the periodictable or the trivalent elements from cerium to lutetium; and

B is an element of the transition metal elements of groups IIIB, IVB orVB of the periodic table.

The second oxide layer may have a thickness of less than 15 nm, a bandgap of greater than about 5.5 eV, a conduction band offset energy ofgreater than 1.5 eV, and/or an equivalent oxide thickness (EOT) of about0.5 to about 1.6 nm. In certain embodiments, B is an element with 3d, 4dor 5d electrons available for bonding to oxygen and A is an element inwhich one 5d electron is available for bonding. B may be scandium,titanium, tantalum or niobium. A may be trivalent gadolinum,praseodynium or lutetium. A can be cerium, nedoymnium, promethium,samarium, europium, terbium, dysprosium, holmium, erbium, thulium, orytterbium.

The first oxide layer can include a nitrided silicon dioxide and/or maycontribute less than about 0.5 nm of oxide-equivalent capacitance tosaid field effect transistor.

Devices according to embodiments of the present invention include afield effect transistor, a photovoltaic device, and/or a high electronmobility transistor.

According to further embodiments of the present invention, methods offorming a semiconductor device include providing a semiconductorsubstrate and forming a first oxide layer on the semiconductorsubstrate. A second oxide layer is formed on the first oxide layeropposite the semiconductor substrate. The second oxide layer comprisinga stoichiometric, single-phase, complex oxide represented by the formuladescribed above.

Methods according to embodiments of the present invention can includeexposing the substrate to one or more gaseous sources comprisingelements A, B, and oxygen such that one or more gaseous sources react toform the second oxide layer. The one or more gaseous sources can includean amount of oxygen sufficient to substantially oxidize elements A andB.

The second oxide layer can be formed by a remote plasma-enhancedchemical vapor deposition process. A gaseous source comprising oxygenand a rare-gas element can be exposed to radio-frequencyplasma-excitation or microwave frequency plasma-excitation. The gaseoussource comprising oxygen and a rare-gas element can be combined with agaseous source comprising element A and element B. The substrate can beexposed to the combined gaseous source. The second oxide layer can beformed by an atomic layer absorption process.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an electronic structure diagram of band edge electronic statesin SiO₂, which may be representative of network non-crystallinedielectrics, and a thin film transition metal or rare earth oxide, whichmay be representative of a large class of high-K elemental oxidedielectrics;

FIG. 2 is a graph of the band gap and conduction band offset energyscaling for transition metal oxides as a function of the energy of theiratomic highest occupied atomic d-state in the s²d^(n-2) configuration;

FIGS. 3 a and 3 b are cross sectional side views of a field effecttransistor comprising a thin film oxide gate insulating layer accordingto embodiments of the present invention;

FIGS. 4 a and 4 b are cross sectional side views of a photovoltaicdevice comprising a thin film oxide passivation layer according toembodiments of the present invention;

FIGS. 5 a and 5 b are cross sectional side views of a high electronmobility transistor comprising a thin film oxide passivation layeraccording to embodiments of the present invention;

FIGS. 6 a to 6 d are schematic illustrations of local bondingarrangements of the constituent atoms, including band edge electronicstructures: FIG. 6 a illustrates silicon and aluminum oxides, SiO₂ andAl₂O₃, respectively; FIG. 6 b illustrates elemental transition metal orlanthanide rare earth oxides; FIG. 6 c illustrates Tm or Re silicate oraluminate alloys, and FIG. 6 d illustrates complex oxides; and

FIG. 7 is a schematic comparison of the band edge electronic structurenon-crystalline Tm or Re elemental oxides and non-crystalline complexoxides according to embodiments of the present invention.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

The present invention now will be described more fully hereinafter withreference to the accompanying drawings and examples, in whichembodiments of the invention are shown. This invention may, however, beembodied in many different forms and should not be construed as limitedto the embodiments set forth herein. Rather, these embodiments areprovided so that this disclosure will be thorough and complete, and willfully convey the scope of the invention to those skilled in the art. Inthe drawings, the thickness of layers and regions are exaggerated forclarity. Like numbers refer to like elements throughout. It will also beunderstood that when a layer is referred to as being “on” another layeror substrate, it can be directly on the other layer or substrate, orintervening layers may also be present.

According to embodiments of the present invention, oxides are providedthat may be represented by the formula (I):(A_(m)O_(n))_(a)(B_(q)O_(r))_(b) or equivalently A_(h)B_(j)O_(k),  (I)in which the elemental oxide components, A_(m)O_(n) and B_(q)O_(r), arecombined so that h=j or, equivalently ma=bq. The variables a, b, h, j,k, m, n, q and r are non-zero integers, and A is a lanthanide rare earthatom and B is a first, second or third row transition metal from groupIIIB, IVB or VB, respectively. Oxides according to embodiments of thepresent invention include stoichiometric, single-phase, complex oxidesaccording to formula (I). It should be understood that(A_(m)O_(n))_(a)(B_(q)O_(r))_(b) or A_(h)B_(j)O_(k) are equivalentrepresentations of stoichiometric formulations according to embodimentsof the present invention and may be used interchangeably.

As used herein, the lanthanide rare earth series is defined as it is inF. A. Cotton and G. Wilkenson, Advanced Inorganic Chemistry, AComprehensive Text, 3rd Edition, (Interscience Publishers, New York,1972), from Ce atomic number 58 with one 4f electron, to Lu, atomicnumber 71 with a complete shell of ten 4f electrons. Accordingly, groupIIIB elements are in order of increasing atomic number, Sc (atomicnumber 21), Y (atomic number 39), and La (atomic number 57).

Referring to formula (I) and without wishing to be bound by theory,atoms A and B may have different respective atomic d-state energies inthe s²d^(n-2) configuration identified above. Examples of thin filmcomplex oxides that are described by formula (I) include, GdScO₃,Dy₂Ti₂O₇, SmNbO₈, where Gd, Dy, and Sm are the A atoms are from thelanthanide rare earth group, and Sc, Ti and Nb are first row transitionatoms from groups IIIB, IVB and VB, respectively. Accordingly, bondingarrangements may be specified at the atomic scale in stoichiometric thinfilm complex oxides according to formula (I).

Oxides according to formula (I) may exhibit improved features withrespect to the following exemplary characteristics: i) electronic andoptical band gaps, ii) conduction band offset energies with respect tosemiconductors, including Si, Si, Ge alloys, Ge, as well as compoundsemiconductors including SiC, GaN, (Al,Ga)N, GaAs, (Al,Ga)As, (In,Ga)As,GaSb, (Al,Ga)Sb, (In,Ga)Sb and the like, as well nitride, arsenide andantimonide quaternary III-V alloys, and/or iii) static dielectricconstants. Separate and independent control of these features may beaccomplished, for example, through materials engineering at the atomicscale, and, in particular, through the interactions between the atomicd-states of the respective transition metal and rare earth atoms throughbonding to a common bridging oxygen atom of the intrinsic microscopicbonding structures of the thin film, stoichiometric complex oxidesdescribed herein. Thin film, stoichiometric complex oxides according toformula (I) may be integrated into metal-oxide-semiconductor (MOS)devices and can provide improved performance as compared to theirconstituent elemental oxides and/or pseudo-binary alloys of theirconstituent oxides with network forming oxides such as non-crystallineSiO₂, Al₂O₃ and the like. The complex oxides according to formula (I)can also provide surface passivation layers for photovoltaic devicesand/or buried channel high electron mobility transistors (HEMTs).

Complex oxides, including group IIIB oxides such Y₂O₃ and La₂O₃ incombination with lanthanide rare earth oxides such as Gd₂O₃ and thelike, may have different, potentially advantageous, properties whencompared to their constituent elemental oxides. The complex oxides canbe less hydroscopic in combination than their respective constituentoxides, which can result in advantages in processing complexity. Thismay be achieved while maintaining large band gaps, e.g., greater thanabout 5.5 eV and large conduction band offset energies, e.g., greaterthan 1.5 eV.

According to embodiments of the present invention, thin film oxidesaccording to formula (I) are provided as passivation or active layers invarious electronic, photoelectronic, and/or microelectronic devices. Forexample, thin film oxides according to formula (I) may be used as gatedielectrics that are a constituent of microelectronic devices such asinsulating gate field effect transistors (IGFETs), that includecrystalline, polycrystalline, and amorphous (non-crystaline)semiconductors. In still further embodiments according to the presentinvention, thin film surface passivation layer dielectric materials areprovided for other devices including photovoltaic devices, such asradiation detectors and solar energy converters, and buried channelfield effect transistors, such as HEMTs. Thin film dielectrics accordingto embodiments of the present invention may be generally less than 15 nmthick, and may be non-crystalline. As used herein, “non-crystalline” and“amorphous” are used interchangeably to refer to substances in which theatoms do not generally exhibit crystallinity on any size scale, forexample, as determined by conventional x-ray, electron or neutrondiffraction, and electron imaging techniques, including, but not limitedto high resolution transmission electron micrographs, in either thebright or dark field measurement configurations, or alternatively, andin both bright and dark field images of the same portion of thedielectric film. Moreover, high resolution analytical techniques thatare incorporated in the scanning transmission electron microscopes canbe used to establish the single-phase nature of dielectrics.

In some embodiments according to the present invention, thin film oxidesaccording to formula (I) may be employed in field effect transistors asthin gate insulating layers having high dielectric constants. The thinfilm oxides potentially allow for field effect transistors employing thesame to possess gate capacitance in excess of what may be achieved withconventional insulating layers and with reduced direct tunnelingcurrents. As an example, the direct tunneling currents may be reduced byone order of magnitude, two to three orders of magnitude, or more, suchas from levels in excess of 1 A/cm² for an EOT of approximately 0.5 to1.6 nm.

Thin film dielectrics including oxides according to formula (I) may beprovided with high band gaps (E_(g)), e.g., greater than 5 eV, and largeconduction band offset energies in comparison to conventionalsemiconductor materials such as crystalline silicon, e.g., greater thanat least about 1 eV or about 1.5 eV and above. Dielectric materialsaccording to Formula (I) may be used in i) metal-oxide semiconductorfield-effect transistors (MOSFETs) or Si IGFETs, as well as ii) thinfilm transistors (TFTs), which include IGFETs in which all of theconstituent layers are formed by thin film deposition techniques. Gatedielectrics according to formula (I) for silicon MOSFETs may havesignificantly higher dielectric constant (K) than non-crystalline (or,equivalently, amorphous) SiO₂ (K=3.9) to enable the gate dielectric toreach an electrical equivalent of an SiO₂ layer, generally designated asthe equivalent oxide thickness or EOT, with a physical thickness,t_(ox), of less than about 10 Å with a substantially thicker film inwhich the physical thickness is increased by the dielectric constantratio (See The International Technology Roadmap for Semiconductors: 1999(Semiconductor Industry Association, San Jose, Calif., 1999), pp.105-141. and G. D. Wilk, R. M. Wallace, and J. M. Anthony, “High K GateDielectrics: Current Status and Materials Properties Considerations,” J.Appl. Phys. 89 (2001) 5243-5275.) Moreover, gate dielectrics may beprovided having a relatively large band gap of about 4 electron volts(eV), about 5 eV or more, and large band offset energies with respect tothe conduction and valence bands of Si, ΔE_(c) and ΔE_(v), respectively,at least ˜1 eV or more than 1.5 eV in order to provide sufficiently lowgate leakage.

The oxides according to formula (I) may be used in field effecttransistors, including insulating gate field effect transistors(IGFETs), metal-oxide-semiconductor field effect transistors (MOSFETs)and thin film transistors (TFTs). For example, the gate insulatinglayers of such devices can include the thin oxides represented by theformula (I).

Methods of fabricating devices described herein can include deliveringgaseous sources comprising element A, gaseous sources comprising elementB, and gaseous sources comprising oxygen on substrates such that thegaseous sources comprising element A, the gaseous sources comprisingelement B, and the gaseous sources comprising oxygen react to form the adesired complex oxide. The elements A and B are delivered in amountsnecessary and sufficient for achieving chemical stoichiometry, e.g.,equal concentrations of A and B atoms in the resulting thin films. Thegaseous sources comprising oxygen can contain a sufficient amount ofchemically active oxygen such that the elements A and B are completelyoxidized. For example, the delivery of the gases may be carried out as adeposition. Various gaseous sources comprising element A and gaseoussources comprising element B may be employed. Examples of gaseoussources comprising element A and gaseous sources comprising element Binclude, but are not limited to, alkoxide compounds, organo-metalliccompounds, inorganic compounds, and mixtures thereof. The alkoxidecompound may be selected from the group consisting of an ethoxide, apropoxide, and a butoxide. Other gaseous sources comprising element Aand gaseous sources comprising element B can be used, such asorgano-metallic source gases, including those that are capable ofproducing the desired binary oxides (e.g., diketonates) along with otherorgano-metallics that contain metal-oxygen bonds. Other inorganicsources of elements A and B can be employed such as halides andnitrates. The gaseous sources comprising element A and/or element B canbe derived through the evaporation of respective liquid sourcescomprising these elements, particularly in embodiments in which thedeposition involves a physical deposition or a plasma chemical vapordeposition process.

A number of sources of oxygen may be employed. Exemplary sources ofoxygen include, but are not limited to, oxygen atoms, oxygen ions,oxygen metastables, oxygen molecular ions, oxygen molecular metastables,compound oxygen molecular ions, compound oxygen metastables, compoundoxygen radicals, and mixtures thereof. Compounds that can be employed inthe gaseous sources include, but are not limited to, O₂, N₂O, andmixtures thereof. The formation of thin film complex oxides may takeplace in non-equilibrium chemical environments.

The gaseous sources comprising element A, element B, and oxygen mayfurther comprise other components such as, for example, inert gases(e.g., argon (Ar) helium (He), or other noble gases, as well as mixturesthereof).

A number of deposition techniques can be used in forming thin filmoxides. Exemplary techniques include, but are not limited to, alaser-assisted chemical vapor deposition, a direct or remote plasmaassisted chemical vapor deposition, a electron cyclotron resonancechemical vapor deposition, a reactive physical vapor deposition and anatomic layer deposition. For example, a remote plasma assisted chemicaldeposition (REPCVD) can be employed. Various reactive physical vapordepositions can be used such as, for example, a thermal evaporation, anelectron beam evaporation, a parallel plate radio frequency (rf)sputtering, a direct current (dc) sputtering, a radio frequency (rf)magnetron sputtering, and a direct current (dc) magnetron sputtering. Areactive physical vapor deposition may also occur in the form of anatomic layer absorption process.

Fabrication of thin films according to embodiments of the invention maybe carried out under any number of temperature and pressure conditions.Various fabrication steps may be carried out at a temperature from about250° C. to about 400° C. and or at pressure conditions from about 200milli-Torr to about 500 milli-Torr.

Conventional equipment may be used to fabricate complex oxides,including, for example, a suitable reactor (e.g., reaction chamber orvessel). For example, alkoxide liquids comprising elements A and B maybe injected into a reactor downstream from a remote radio-frequencyexcited plasma. The alkoxides may be liquids at room temperature, but atthe temperature range employed in the reactor have sufficient levels ofvapor to be transported into the reactor. A microwave plasma may beemployed, if desired.

The gaseous source comprising oxygen may be plasma-excited, e.g., bybeing subjected to a radio-frequency or microwave-frequency source. Thegaseous source comprising oxygen may be present in combination with aninert gas such as, for example, a rare gas such as, but not limited to,helium (He) or argon (Ar). The gaseous source comprising oxygen may beinjected into the reactor at a high flow rate (e.g., 200 standard cubiccentimeter per second (SCCM) through a tube with an inside diameter ofabout one inch) through a plasma tube at a location upstream relative towhere the gaseous source comprising element A and the gaseous sourcecomprising element B are injected into the reactor. The above injectionconfiguration is believed to be potentially advantageous since it mayminimize back-streaming of the gaseous sources comprising element A andthe gaseous sources comprising element B. See e.g., G. Lucovsky, IBM J.of Res. and Devel. 43, 301 (1999).

Other techniques can be employed to provide for the deposition of thethin film comples oxide materials in a highly oxidizing environment.Exemplary techniques include, but are not limited to, embodimentsinvolving plasma deposition, such as direct plasma deposition inconventional parallel plate reactors, triode plasma deposition,electron-cyclotron-resonance plasma deposition, laser-assisteddeposition, and reactive physical vapor deposition using ozone,plasma-excited oxygen, or laser-excited oxygen.

Depending on the particular application, thin film dielectrics may bedeposited onto either i) insulating substrates such as bulk fused silicaand crystalline aluminum oxide (sapphire), ii) semiconductor substratessuch as and not limited to Si, Ge, (Si,Ge) alloy, SiC, GaN, GaAs, GaSb,InP and other group III-V ternary and quaternary alloy substrates, ZnS,ZnSe, CdTe and group III-VI ternary and quaternary substrates, iii)semiconductor substrates with thin dielectric layers, including, but notrestricted to Si with (a) nitrided SiO₂, and (b) non-crystalline Laaluminate, and (b) GaN and (Ga,Al)N and the like with GaO_(x) orAlO_(x), x˜1.5, and iv) metallic substrates including ordinary metalssuch as Al and the like, transition metals and rare earths, includingTi, Ta, Mn, Fe, Co, and Ni, and lanthanide rare earth metals, includingGd, Nd and the like.

The depositions of the complex oxides may be performed inultra-high-vacuum compatible multi-chamber systems equipped withconventional substrate introduction load locks, and the like, but thecan also be performed in reactors that incorporate sufficient purging,and gas flow dynamics to prevent chemical contamination of films orsubstrates. Specific vacuum compatible deposition techniques include: i)chemical vapor deposition from organo-metallic, halide or hydridetransition metal and rare earth precursor molecules in the presence ofstrong oxidizing agents such as oxygen atoms, ozone, or other oxidemolecules that are known sources of oxygen, such as, and not limited tonitrous oxide, N₂O and nitric oxide, NO, ii) plasma or photo-assistedchemical vapor deposition using the same transition metal, rare earthand oxygen atom precursor species as for chemical vapor deposition, iii)reactive physical vapor deposition from elemental or compound sources,iv) magnetron or parallel plate reactive sputtering from elemental orcompound targets in an ambient that leads to formation of stoichiometriccomplex oxides, v) atomic layer deposition using precursor and oxidizingcycles that leads to formation of stoichiometric complex oxides.

Oxides represented by formula (I) may be used as dielectric material inintegrated circuit devices, including very large scale integration(VLSI) devices including Insulated Gate Field Effect Transistors(IGFET), also referred to as MOSFET or CMOS devices. As an example,field effect transistors may be provided including gate insulatorscomprising non-crystalline oxides represented by the formula (I).

For the purposes of illustration, embodiments describing field effecttransistors are set forth in FIGS. 3 a and b. A field effect transistor10 according to embodiments of the present invention is set forth inFIG. 3 a. The field effect transistor 10 comprises an integrated circuitsubstrate 20 having a surface 25. Source and drain regions 30 and 40respectively are present in the substrate 20 at the surface 25 in aspaced apart relationship. A gate insulating layer 50 is present on thesubstrate 20 at the surface 25 between the spaced apart source and drainregions, 30 and 40 respectively. The gate insulating layer 50 comprisesthe non-crystalline oxide represented by the formula (I) set forthherein. Source, drain, and gate contacts (60, 70, and 80 respectively)are also present and contact source and drain regions 30 and 40 and thegate insulating layer 50.

A number of materials can be employed in the integrated circuitsubstrate, the selection of which are known by those skilled in the art.As an example, the substrate may comprise a material selected from thegroup consisting of a Group III-V ternary alloy, a Group III-Vquaternary alloy, a Group III-nitride alloy, and combinations thereof.Examples of Group III-V ternary alloys include, but are not limited to,(Ga,Al)As, (In,Ga)As, and combinations thereof. An example of a GroupIII-v quaternary alloy includes, but is not limited to, (Ga,In)(As,P).Examples of Group III-nitride alloys include, but are not limited to,(Ga,A)N, (Ga,In)N, (Al,In)N, (Ga,Al,In)N, and combinations thereof.Quaternary alloys of the above may also be employed. Additionally, groupIII-V antimonides, such as GaSb, III-V ternary antimonide alloys,(Al,Ga)Sb, (In,Ga)Sb, and III-v quaternary alloys, (In,Al,Ga)Sb are alsoincluded in MOSFET device substrates containing the channel region ofthe device.

Other examples of materials that may be employed in the integratedcircuit substrate include, but are not limited to, silicon (Si),germanium (Ge), silicon carbide (SiC), gallium nitride (GaN), galliumarsenide (GaAs), as well as other compounds from Groups III and V.Combinations thereof may also be employed.

The integrated circuit substrate may encompass a number of specificsubstrates that are employed in devices of this type. One example of asubstrate is a semiconductor-on-insulator (SOI) substrate.

The source, drain, and gate contacts may include those that areconventionally known in the art. As an example, the gate contact may beformed from polysilicon and/or metal materials.

The field effect transistor may also include other layers of materials.For example, in some embodiments (not shown), the field effecttransistor may include an interfacial layer positioned between thesubstrate and the gate insulating layer. The interfacial layer mayinclude an oxide, such as an oxide including an element from thesemiconductor substrate. For example, the substrate may include Si orSiC and, consequently, the interfacial layer may include silicon dioxide(SiO₂). Other insulating materials may be employed. Other interfaciallayers such as those comprising gallium oxide (GaO₃), aluminum oxide(Al₂O₃), or alloys thereof, may be used with compounds from Groups IIIand V along with their alloys. The use of the interfacial layer may beadvantageous in electron-channel (n-channel) FETs and hole-channel(p-channel) FETs. The interfacial layer may contribute less than 0.5 nmof oxide-equivalent capacitance to the field effect transistor. Ingeneral, the use of an interfacial layer is believed to be advantageousin that it may: (1) prevent or minimize further oxidation of the siliconsubstrate during film deposition in highly oxidizing environments, (2)prevent or minimize formation of silicide bonds during the initialstages of deposition of the non-crystalline oxide materials,particularly with respect to, for example, the formation of Ta—Si bondsduring the deposition of AlTaO₄.

Referring now to FIG. 3 b, an additional layer 55 is depicted betweenthe gate insulating layer 50 and the integrated circuit substrate 20 infield effect transistor 10. As shown in FIG. 3 b, the additional layeris approximately one layer of interfacial bonding that includesapproximately one Si—N bond per silicon substrate atom.

The field effect transistor described herein may be fabricated bymethods known to a person skilled in the art. For example, a gateinsulating layer may be formed by depositing a non-crystalline oxide onthe substrate of the field effect transistor by employing an appropriatetechnique including, but not limited to, those described herein. Aninterfacial layer may be formed on a substrate of the field effecttransistor by a suitable process such as, but not limited to, remoteplasma-assisted oxidation, low pressure thermal oxidation, chemicaloxidation, or photo-assisted oxidation. Thereafter, the gate insulatinglayer is formed by depositing the non-crystalline oxide material on theinterfacial layer in the same deposition chamber used to form theinterfacial layer. Alternatively, an in-line system with substratetransfer in either a high vacuum or inert environment can be used, inwhich chemical reactions with the interfacial layer may be minimized orprevented.

As described herein, in various embodiments, the non-crystalline oxidesmay be employed in field effect transistors as thin gate insulatinglayers having high dielectric constants. Advantageously, thenon-crystalline oxides potentially allow for field effect transistorsemploying the same to possess gate capacitance in excess of what maypossibly be achieved with conventional insulating layers withsignificantly reduced direct tunneling currents. As an example, thedirect tunneling currents may be reduced from levels in excess of 1A/cm².

FIG. 4 a illustrates a photovoltaic device 150 having a p-typesemiconductor layer ohmic contact 102, a p-type layer 101, an n-typelayer 100, a dielectric film surface passivation layer 104, a seconddielectric layer 105 and ohmic contacts 103. A thin film stoichiometricoxide, such as an oxide according to the formula (I), is used as asurface passivation layer 104. The surface passivation layer 104 canreduce loss of photo-generated carriers in the n-type semiconductorlayer 100 of the device 150. The surface passivation layer 104 and thesecond dielectric layer 105 can together form an anti-reflectioncoating. Dielectric thin films, such as oxides according to the formula(I), used as the surface passivation layer 104 may have a positive fixedcharge at the interface between the n-type layer 100 and the surfacepassivation layer 104. This may produce a surface potential at theinterface that can reduce recombination of photo-generated holes. Usingthe device 150 as a radiation detector under reverse bias (i.e., with apositive bias applied to the n-layer 100 through the ohmic contact 103,and the p-layer 101 maintained at ground potential through the p-typesemiconductor layer ohmic contact 102) it may be necessary to have holesgenerated by absorption of electromagnetic radiation in the infra red,visible or near ultra-violet regions of the spectrum be transmitted intothe p-layer 101 and subsequently contribute to a short circuit currentin the reverse bias mode. The device 150 can also be operated an opencircuit voltage or the photo-diode detector mode when the ohmic contact103 is connected to ground through a high impedance resistive load, or apower transfer mode when the impedance of the device 150 is matched tothe load resistor and no additional bias is applied. As shown in FIG. 4a, the passivation layer 104 can also serve as anti-reflection filmthrough the incorporation of second dielectric 105, such as Si₃N₄ orSiO₂, and the like. The second dielectric 105 can be thicker than thepassivation layer 104, and the thickness may be tuned to a wavelengththat is within the absorption band of the semiconductor materials thatcomprise n-type layer 100 and p-type layer 101, as for example, Si,(Si,Ge), Ge, SiC, GaAs, (Al,Ga)As, GaN, (In,Ga)N and the like.

As illustrated in FIG. 4 b, a third dielectric layer 106 has been addedbetween the surface passivation layer 104 and the second dielectriclayer 105, which are on p-type layer 110 and n-type layer 111. Theconductivity types of layers 100 and 101 in FIG. 4 a and layers 110 and111 in FIG. 4 b may be reversed so that the layers are complementary,e.g., such that one is doped n-type and the other is doped p-type. Thevarious dielectric layers, including the dielectric film surfacepassivation layer 104, the second dielectric layer 105, and/or the thirddielectric layer 106, can be thin film, stoichiometry, single-phasedielectrics, such as oxides of formula (I). Such dielectric materialsgenerally have positive fixed charge. If the conductivity types are asshown in FIG. 4 b (i.e., p-type semiconductor layer 110 and n-typesemiconductor layer 111), then the third dielectric layer 106 may beinserted between the dielectric surface passivation layer 104 and thesecond dielectric layer 105. If the third dielectric layer 106 is Al₂O₃,and an alloy of Al₂O₃ with SiO₂, then it may have negative fixed chargeat the internal interface between the dielectric surface passivationlayer 104 and the third dielectric 106. This configuration may reduceelectron recombination at the surface of p-type semiconductor layer 110,and can improve device performance in any one the three modes ofoperation described above. Moreover, the relative thicknesses of thedielectric layers including the dielectric surface passivation layer104, the second passivation layer 105 and the third passivation layer106 can be adjusted so that in combination they serve as anti-reflectioncoating with respect to a wavelength of electromagnetic radiation thatis consistent with a desired functionality of the device 150. Theselection of relative thicknesses can be achieved through methods knownto those of skill in the art.

A high electron mobility transistor or HEMT device 250 is shown in FIG.5 a. The HEMT device 250 includes a substrate 203. Various layers of theHEMT device 250 are formed on the substrate 203, including a curriedchannel semiconductor layer 202, a wide band gap semiconductorconfinement layer 201, a second wide band gap semiconductor confinementlayer 203, an n-type source 208, an n-type drain 211, a gate electrode205, a source electrode 207, and a drain electrode 210. An ohmic contact209 to the substrate 203 and an ohmic contact 206 to the gate electrode205 are provided. A passivation layer 204 between the n-type drain 211and the gate electrode 205 and also between the n-type source 208 andthe gate electrode 205 is provided. The passivation layer 204 cancomprise a dielectric material, such as materials according to theformula (I). The passivation layer 204 can be a thin film,stoichiometric, single-phase complex oxides.

In operation, a positive bias can be applied to the gate electrode 205,through the ohmic contact 206, and the source contact 207 can be held atground potential through the source electrode 207, which is likewisegrounded. A drain contact can be held at a positive potential throughapplication of positive drain bias voltage to the drain electrode 210.The passivation layer 204 can suppress recombination of electrons at therespective portions of surface of the wide band gap semiconductorconfinement layer 201, denoted as 201 a and 201 b, between the source208 and the drain 211, and the gate electrode 205.

The semiconductor substrate 203, the wide band gap semiconductorconfinement layer 201, the buried channel semiconductor layer 202, andcertain other layers shown in FIG. 5 a can be made of various materials,the selection of which is known to those of skill in the art. Forexample, the substrate 203 and wide band gap semiconductor confinementlayer 201 may be doped n-type Si, and the buried channel semiconductorlayer 202 can be an undoped Si,Ge alloy layer. Moreover, the sourcecontact 208 and the drain contact 211 may be heavily doped, e.g., >10¹⁹cm⁻³ n-type Si.

Alternatively, the semiconductor substrate 203 and wide band gapsemiconductor confinement layer 201 may be doped n-type (In,Ga)As orother group III-V alloy semiconductors that can lattice-matched to anInP substrate, and the buried channel semiconductor layer 202 can be anundoped (In,Ga)As alloy layer with approximately 20 percent InAscontent. The source contact 208 and the drain contact 211 may be aheavily doped (>10¹⁹ cm⁻³) n-type (In,Ga)As alloy.

As another example, the semiconductor substrate 203 in contact with theburied channel semiconductor layer 202 and the wide band gapsemiconductor confinement layer 201 may comprise a doped n-type(In,Ga)As alloy or other alloy semiconductors that are lattice matchedto an InP substrate. The curried channel semiconductor layer 202 can bean undoped (In,Ga)As alloy layer with approximately 20 percent InAscontent. The source contact 208 and the drain contact 211 can be heavilydoped (>10¹⁹ cm⁻³) n-type (In,Ga)As. The substrate 203 may also includedan additional semiconductor layer (not shown), such as heavily doped InPthat may be in contact with both the doped (In,Ga)As portion of 203, andthe substrate layer ohmic contact 209.

In still another example, the semiconductor substrate 203 and the wideband gap semiconductor confinement layer 201 can be a doped n-type(Al,Ga)N alloy, and the buried channel semiconductor layer 202 can be anundoped (Al,Ga)N alloy or GaN. The source contact 208 and the draincontacts 211 can be heavily doped (>10¹⁹ cm⁻³) n-type (Al,Ga)N. Thesubstrate 203 may be a composite layer in which a portion of thesubstrate 203 adjacent the buried channel semiconductor layer 202 isdoped n-type (Al,Ga)N, and a portion of the substrate layer 203 adjacentthe substrate ohmic contact 209 is a single or composite semiconductorlayer such as GaN or SiC, or a combination thereof. Alternatively, theportion of the substrate layer adjacent the substrate ohmic contact 209may include an insulating substrate such as single crystal sapphire,e.g., Al₂O₃.

Referring to FIG. 5 b, the device 250 further includes a seconddielectric layer 212 that is placed between the passivation layer 204and the gate electrode 205 and a portion of the side band gapsemiconductor confinement layer 201. The second dielectric layer can bea dielectric material according to formula (I), or a stackedsemiconductor layer comprising either thermally grown, or plasmaoxidized native oxide such as silicon oxide, gallium oxide or aluminumoxide according, the selections of which are known to those skilled inthe art.

HEMT devices according to embodiments of the present invention mayinclude addition semiconductor layers for improved operation, and/or asmay be required for epitaxial growth of the channel structures. Theintegration of and functionality of these passivation layers may be usedin devices described with respect to the examples discussed herein.Additional passivation layers may be fabricated from other genericfamilies of III-V semiconductors including antimonides such as GaSb,III-V ternary antimonide alloys, (Al,Ga)Sb, (In,Ga)Sb, and III-Vquaternary alloys, (In,Al,Ga)Sb and the like.

As discussed above, the thin film, stoichiometric, single-phase complexoxides, such as oxides described by formula (I), may have applicationsthat include gate dielectrics and passivation layers for electronic andphotonic devices as described herein. Oxide films may be provided thatare generally thinner than 15 nm. The thickness of a film can bedetermined from cross section transmission electron micrographs or byspectroscopic techniques such as thin film interference, andspectroscopic or single wave length ellipsometry. Other methods may alsobe applied. Single-phase, thin film complex oxides may be provided thatcan be either non-crystalline (as determined by conventional x-ray orelectron diffraction methods, including bright field-dark field imaging,or alternatively nano- or micro-crystalline according to conventionaldiffraction methods indicated above, but also including other methodssuch as extend x-ray absorption fine structure spectroscopy, or EXAFS).

With reference to formula (I) and as discussed above, A is a lanthaniderare earth atom and B is a first, second or third row transition metalfrom group IIIB, IVB or VB, respectively, that are bound to a commonoxygen atom. Atoms A and B generally have different atomic d-stateenergies in the s²d^(n-2) configuration. Without wishing to be bound bytheory, the limitation for a specific type of stoichiometry, such asdefined in formula (I), may result in coupling of both constituent atomatomic-d states through bonding to a common oxygen atom. The limitationmay also exclude other possible bonding arrangements in which equalnumbers of atoms of a given class, lanthanide rare earth or transitionmetal, are connected through a common oxygen atom. As one example, thismay be achieved in chemically-ordered oxides, which include equalconcentrations of these two metal atom constituents, the transitionmetal and lanthanide rare earth atoms, and in which the oxygen atomcoordination is effectively even in character, e.g., four, six or eight,or a mixture thereof, and allowing for small differences in nearestneighbor inter-atomic bond length that may be associated with the filmmorphology, non-crystalline, or micro- or nano-crystaline. Other bondingarrangements that involve bonding between oxygen atoms and thetransition metal and lanthanide rare earth atoms are possible.

Once again without wishing to be bound by theory, a comparison betweenthin film stoichiometric complex oxides according to formula (I) andother high-K dielectrics may be made with reference to the electronicstructures illustrated in FIGS. 6 a to 6 d. FIG. 6 a is a schematicillustration of the basic element of local bonding, and the resultantband edge electronic structure in SiO₂. Similar bonding prevails inAl₂O₃ as well. As shown in FIG. 6 a, the electronic structures consistof local arrangements in which Si and Al atoms, respectively, areconnected as next-nearest bonding neighbors through a common oxygenatom. The electronic structure diagram indicates the chemical andsymmetry character of the highest lying state in the valence band thatdetermines, for example, the valence band offset energy difference withrespect to crystalline Si, or to another semiconductor. This state ispure oxygen atom 2p non-bonding state with π symmetry. The lowestconduction band state is an anti-bonding silicon atom 3s*-state withσ-bonding character.

FIG. 6 b schematically illustrates the basic element of local bonding,and the resultant band edge electronic structure, in transition metaland lanthanide rare earth elemental oxides, e.g., the transition metaloxides Y₂O₃, ZrO₂ and Nb₂O₃, and the rare earth lanthanide trivalentoxides including, as an example, Gd₂O₃. The corresponding local bondinggroup includes transition metal or lanthanide rare earth atoms, denotedas Tm/Re as next nearest neighbors bonded to the same oxygen atom.

The highest lying states of the valence band are depicted in FIG. 6 c,which is a schematic illustration of the basic element of local bonding,and the resultant band edge electronic structure in transition metal(lanthanide rare earth) silicate and aluminate alloys in the lowconcentration alloy range. For these alloys there are three types oflocal bonding, denoted schematically as Si—O—Tm(Re), Si—O—Si andTm(Re)—O—Tm(Re). The bonding arrangements vary with alloy content, andassuming chemically-ordered bonding at the compound silicate phase withthe highest SiO₂ concentrations corresponding to as examples,(TmO₂)_(0.5)(SiO₂)_(0.5) for group IVB Tm silicates where Tm=Zr and Hf,and (Tm₂O₃)_(0.33)(SiO₂)_(0.67) for group Tm (and also for trivalentlanthanide Re) silicates, in the concentration range from SiO₂ to thesecompositions there are Si—O—Si and Si—O—Tm. For this alloy regime, whichmay be of interest for technology applications where Hf silicates arethe materials of choice, the lowest conduction band states have beenshown to be at the same energy relative to the conduction band ofsilicon as for HfO₂ as represented schematically in a comparison betweenFIGS. 6 a to 6 c.

FIG. 6 d is a schematic illustration of the basic element of localbonding, and the resultant electronic structure that may be present inthe thin film, stoichiometric complex oxides according to formula (I).For this case, atomic d-states of the respective Re and Tm with the samebonding symmetry, either σ or π, interact with each other throughbonding to the same oxygen atom with a compatible bonding-symmetry,either σ or π, according the symmetry of the d-states, respectively, σor π, in bonding groups represented schematically by Re—O—Tm. Theresulting valence band states immediately below the top of the valenceband defined by the oxygen 2p non-bonding p states, are energies thatare different from those of Tm—O—Tm and Re—O—Re and complementaryconduction states, particularly the state that the defines the lowestband gap, and the conduction band offset energy with respect to Si andother semiconductors is different as well.

Returning to FIGS. 6 a to 6 c, the band gaps and offset energies of theprior art gate dielectric and passivating oxides will now be discussed.The band gaps and band offset energies for the dielectrics of FIG. 6 amay result from bonding between atomic 3s and 3p states of Si or Al, andoxygen atom 2p states, and as such give rise to large band gaps (e.g.,greater than 8 eV), intermediate range dielectric constants (e.g.,between 3.9 (for SiO₂) to about 10-12), as well as relative largevalence and conduction band offset energies (e.g., greater thanapproximately 2 eV). The lowest conduction band states in SiO₂ may bepredominantly 3s-like, whereas, the lowest bonding states in Al₂O₃ caninclude a larger mixing of 3p due to the increased bond ionicity,approximately 57% on the Pauling scale for Al₂O₃ in contrast to ˜45% onthe same scale for SiO₂. The dielectrics having electronic states suchas those shown in FIG. 6 b span a wide range of band gaps, dielectricconstants and band offset energies where, as noted herein, and shown inFIG. 2, the band gap and band offset energies can scale with the highestoccupied atomic d-state energies of the respective transition metal andlanthanide rare earth lanthanide atoms in the s²d^(n-2) configuration.There may also be an additional, but weaker scaling of the dielectricconstant, K, with band gap; K typically increases as the band gapdecreases. The situation for the silicate and aluminate alloys may bemore complex, but understood for dielectrics of according to the diagramof FIG. 6 c. The band gaps scale with alloy composition, increasing aseither the SiO₂ or Al₂O₃ alloy fraction is increased, but the conductionband offset energies in the alloys with respect to Si and othersemiconductors may be determined solely by the atomic d-state energiesof the transition or rare earth atoms in much the same way as they arein the respective transition metal or rare earth elemental oxides. Onthe other hand, the valence band offset energies with respect to siliconand other semiconductors may be increased as the SiO₂ or Al₂O₃ contentcan be increased.

Dielectrics according to the schematic diagram of FIG. 6 d may bequalitatively and quantitatively different than dielectric materialsaccording to the schematic diagrams of FIGS. 6 a to 6 c. Because ofd-state quantum mechanical wave function mixing through bonding ofdifferent transition metal and lanthanide rare earth atoms to a commonoxygen atom, the valence band π-bonding states may be changed in energy,resulting in increases in both the band gaps of these complexstoichiometric oxides and their conduction band offset energies withrespect to silicon and other semiconductors. Choices of the differentcombinations of transition metal and rare earth atoms bonded to the sameoxygen atom may effect the resulting properties of the material. Forexample, in general, the larger the difference in the atomic d-states ofthese atoms the larger the increase in band with respect to the smallerband gap member of the pair. As a general example, the lanthanide rareearth atomic 4d-state energies are nominally −5.6 to −6 eV with respectto vacuum; the lowest d-state energy if the −11 eV for the 3d state ofTi, with Nb and Ta following close behind with respective energies of−10 eV and −9.6 eV. Taking the 5d-state energy of an average lanthaniderare earth atom at −6.8 eV, the respective differences for a ReTi2O7complex oxide, a ReNbO4 complex oxide and a ReTaO4 complex oxides may berespectively, about 4.2 eV, 3.2 eV and 2.8 eV.

In some instances, the band gap shift can be estimated in context of avirtual crystal approximation such that the complex oxide displaysproperties that are a simple, or weighted averages of the end memberoxides. Based on the overlap integral differences, valence band statesare at intermediate energies with respect to the corresponding elementaloxides states, thereby increasing the energy of the lowest conductionband state with respect to the transition metal oxide atom. An exampleof virtual crystal approximation scaling is illustrated by comparisonsbetween GdScO₃ and ZrO₂, where the onsets of strong absorption occurrespectively at 5.8 and 5.7 eV, demonstrating that that GdScO₃ with 5datomic states for the lanthanide rare earth atom Gd, and 3d atomicstates for the transition metal atom Sc, has a band gap characteristicof a 4d transition metal oxide with a 4d-state energy equal to theaverage of the 3d- and 5d-state energies of Sc and Gd, respectively. Theaverage atomic d-state energy in GdScO₃ is equal to approximatelyone-half of the sum of −6.6 eV for the 5d-state of Gd and −9.4 eV forthe 3d-state of Sc, or −8 eV. This value is approximately equal theatomic 4 d-state energy of Zr, which is −8.13 eV.

The band edge electronic structure of a transition metal or rare earthelemental oxide and a complex oxide according to formula (I), e.g. acomplex oxide including a group IIIB transition metal oxide such asSc2O3, and lanthanide group rare earth oxide such as Gd₂O₃, isillustrated schematically in FIG. 7. Specific examples of complex oxidesidentified by formula (I) include, but are not limited to thin film i)GdScO₃, DyScO₃, SmScO₃, and other trivalent lanthanide rare earth oxidesin combination with the group IIIB transition metal oxide, Sc₂O₃, ii)Gd₂Ti₂O₇, Dy₂Ti₂O₇, Sm₂Ti₂O₇ and other trivalent lanthanide rare earthoxides in combination with the group IVB transition metal oxide TiO₂,iii) GdNbO₄, DyNbO₄, SMnNbO₄ and other trivalent lanthanide rare earthoxides in combination with the group VB transition metal oxide Nb₂O₃,and iv) GdTaO₄, DyTaO₄, SmTaO₄ and other trivalent lanthanide rare earthoxides in combination with the group VB transition metal oxide Ta₂O₅.

Various tests may be used to characterize thin film oxides. One testinvolves studying the thin film sample by x-ray absorption spectroscopy,sometimes also called near edge x-ray absorption fine structurespectroscopy, either XAS, or NEXAFS, respectively. The specific testincludes a study of three different absorptions which occur in 100 to600 electron volt range of x-ray energies. Mono-energetic ormonochromatic beams of x-rays in this energy range are readily availableat synchrotron light sources at many different synchrotron sites,including Brookhaven National Laboratory and Stanford University in theUnited States, and these measurements can be performed at these orsimilar sites. The tests are described by a specific example. However,it should be understood that the tests may be extended and/orcomparisons or extrapolations may be made to other complex oxides. Forexample, if the complex oxide is GdScO₃, the absorption spectrum can beplotted as normalized absorption in arbitrary units as a function of thephoton energy of the X-rays in eV, for transitions from i) spin orbitsplit Sc 2p atomic states to symmetry split Sc 3d atomic states at athreshold of approximately 400 eV, ii) spin orbit split Gd 4p atomicstates to symmetry split Gd 5d atomic states at a threshold ofapproximately 250 eV, and iii) the oxygen atom K₁ edge with at athreshold energy of approximately 530 eV. A spectral width of interestfor the Sc 2p transitions can be approximately 10 eV, for the Gd 4ptransitions, or approximately 40 eV because of the larger spin orbitsplitting, ˜30 eV in Gd as compared to 4-5 eV in Sc, and ˜15 eV for the0 K₁ edge. Two pairs of symmetry split transitions to 3d states may beobserved for 5c, whereas these pairs of states may be evident, but notreadily separable in the broadened 5d spectral features for Gd. As aresult of the mixing, the complex oxide is expected to display evidencefor no more than two d-states in the O K₁ edge, a narrower one with more3d character, and a broader one with more 5d character, and at an energyseparation of approximately 3.5 to 4 eV. The occurrence of four d-statefeatures in an O K₁ spectrum, each mimicking what is observed in theoxygen K₁ spectrum of the respective constituent oxides, may indicatethat the material is not a chemically-ordered, stoichiometric complexoxide. However, the occurrence of three d-state features in an O K₁spectrum is indicative of atomic d-state mixing, but with differentlocal symmetry conditions applying.

In addition to having band gaps and conduction band offset energies thatmay be increased as compared to the respective transition metal oxides,Sc₂O₃, TiO₂, Nb₂O₅ and Ta₂O₅, oxides according to formula (I) may haverelatively high values of K, e.g., intermediate between those of therespective transition metal and rare earth elemental oxides, butgenerally closer in value to those of the transition metal oxides.

Accordingly, various complex oxides may be provided that can havedifferent properties compared with their elemental oxide constituents(e.g., oxides formed from either A or B in formula (I)). For example,certain elemental oxides may be strongly hydrophilic, such as can becharacteristic of the lanthanide rare earth oxides. Certain elementaloxides may also display significant ionic conductivity, such as thegroup IVB oxides, most notably ZrO₂. In contrast, oxides according toformula (I) may result in reduced hydrophilic and ionic conductivity ascompared with certain elemental oxides.

Embodiments according to the present invention will be described in moredetail with reference to the following non-limiting examples and theaccompanying diagrams.

EXAMPLE 1

A field effect transistor is formed according to the followingprocedure. Radio frequency remote plasma assisted oxidation using oxygenas the source gas is employed to form an SiO₂ insulating layer on aSi-containing substrate such as Si, SiC or a (Si,Ge) alloy. The aboveprocess is carried out at 300° C. A thin film, stoichiometric,single-phase complex oxide according to formula (I) is formed on theinsulating layer via a radio frequency remote plasma enhanced CVDdeposition carried out at 300° C. The structure is then exposed to apost deposition rapid thermal anneal in an inert, non-oxidizing ambientsuch as helium or argon for e.g., 30 seconds at 900° C.

The resulting field effect transistor has an SiO₂ insulating layer witha thickness of less than 0.5 nm (i.e., 5 Å) and a gate insulating layerphysical thickness of more than 2.0 nm (i.e., 20 Å), that, incombination with the interfacial SiO₂ layer is chosen to meet thetargeted EOT, e.g., in the range of 0.7 nm to 1.5 nm.

EXAMPLE 2

A field effect transistor is formed according to the procedure set forthin Example 1 with the following modifications. The substrate is exposedto an N₂ remote plasma to allow for the formation of silicon-nitrogenbonding at the surface of the silicon substrate. The other layers areformed in the manner previously described.

EXAMPLE 3

A field effect transistor is formed according to the procedure set forthin Example 1 with the following modifications. A remote plasma assistedoxidation using N₂O instead of O₂ is employed to form a thin SiO₂ layerwith silicon-nitrogen boding at the silicon substrate.

EXAMPLE 4

The devices described in Examples 1, 2 and 3, wherein the Ge, (Si,Ge)alloys, GaN, (Al,Ga)N and (In,Ga)N and other compound III-Vsemiconductors alloys, such as GaAs, (Al,Ga)As, InP, (In,Ga)As and thelike are substituted for c Si. are employed as the semiconductorsubstrate layer which includes the channel. When compound III-Vsemiconductors other than GaN and (Al,GaN) or (In,Ga)N are used as thesubstrate, these substrate layers may include a sacrificialsemiconductor layer such as Si or GaN nitride, adjusted in thickness tobe converted to a silicon or gallium oxide during the oxidation steps ofExamples 1, 2 and 3, and to prevent oxidation of the underlyingsubstrates which could result in the formation of elemental arsenic orphosphorus, or their oxides.

EXAMPLE 5

A silicon based HEMT device, in which the channel layer is a (Si,Ge)alloy, the confining layers are Si, and in which the passivation layercovers the portions of the device between the source and gate electrode,and the drain and the gate electrode.

EXAMPLE 6

A silicon based HEMT device is provided, in which the channel layer is a(Si,Ge) alloy, the confining layers are Si, and in which the passivationlayer covers the portions of the device between the source and gateelectrode, and the drain and the gate electrode, and in which there isan additional interfacial oxide, or nitrided oxide layer that extendsover the entire surface of the device, including the gate electroderegion. The passivation layer covers this layer between the source andgate electrode, and the drain and the gate electrode, and the gateelectrode covers this layer as well.

EXAMPLE 7

A HEMT device based on III-V alloys that are lattice matched to InP.This includes in one embodiment, an (In,Ga)As channel and confining andsubstrate lattice matched alloys that are also lattice matched to InP.The passivation layer comprises at least one constituent that is a thinfilm oxide according to formula (I), and covers the portions of thedevice between the source and gate electrode, and the drain and the gateelectrode. In a second embodiment, the first constituent of themulti-layer passivation film, also extends below the gate electrode, andis covered completely by the gate electrode.

EXAMPLE 8

A HEMT device based on III-V alloys that are lattice matched to GaN.This can include a GaN channel and confining and substrate layers arelattice matched alloys with wider band gap, as (Al,Ga)N. The passivationlayer comprises at least one constituent that is a thin film oxideaccording to formula (I), and covers the portions of the device betweenthe source and gate electrode, and the drain and the gate electrode.Alternatively, the first constituent of the multi-layer passivationfilm, also extends below the gate electrode, and is covered completelyby the gate electrode.

EXAMPLE 9

A HEMT device based on group III-V antimonides. This can includes a HEMTdevice in which a GaSb layer is the channel and confining and substratelayers, which are lattice matched alloys with wider band gap, as(Al,Ga)Sb. The passivation layer comprises at least one constituentaccording to formula (I), and covers the portions of the device betweenthe source and gate electrode, and the drain and the gate electrode. Inanother example, the first constituent of the multi-layer passivationfilm, also extends below the gate electrode, and is covered completelyby the gate electrode.

EXAMPLE 10

A first photovoltaic example in which the substrate material is dopedn-type Si, either single crystal, polycrystalline or microcrystalline,and the top layer of the device is doped p-type Si, again either singlecrystal, polycrystalline or microcrystalline. An ohmic contact is madeto the entire bottom surface of the substrate material, and the topsurface ohmic contact is either in a ring geometry that is at theperimeter of a circular device, an inter-digitated or comb-like contactthat is customized to the device geometry, e.g., either square orrectangular, or of another design that is consistent with maximizing thesurface exposed to radiation, and minimizing any parasitic seriesresistance that derives from the limit coverage of the top surface. Thesame geometry can be employed with compound semiconductors, e.g., SiC,GaN, GaAs, InAs, and the like, and their ternary or quaternary alloys.The conductivity types of the top and substrate layers can also bereversed.

With respect to the above examples, the devices describe may include athin film, stoichiometric, single-phase complex oxide according toformula (I) as one consituent of a surface passivation film. The surfacepassivation film layer may also provide an anti-reflection function aswell. Various other dielectric components of semiconductor devices canbe fabricated using the complex oxide according to formula (I),including a capacitor dielectric or an isolation trench.

In the drawings and specification, there have been disclosed embodimentsof the invention and, although specific terms are employed, they areused in a generic and descriptive sense only and not for purposes oflimitation, the scope of the invention being set forth in the followingclaims.

1. A semiconductor device comprising: a semiconductor substrate; a firstoxide layer on the semiconductor substrate, the first oxide layercomprising an element from the semiconductor substrate; a second oxidelayer on the first oxide layer opposite the semiconductor substrate, thesecond oxide layer comprising a stoichiometric, single-phase complexoxide represented by the formula:A_(h)B_(j)O_(k), or equivalently (A_(m)O_(n))_(a)(B_(q)O_(r))_(b) inwhich the elemental oxide components, (A_(m)O_(n)) and (B_(q)O_(r)) arecombined so that h=j or, equivalently, ma=bq, and a, b, h, j, k, m, n, qand r are non-zero integers; and wherein: A is an element of thelanthanide rare earth elements of the periodic table or the trivalentelements from cerium to lutetium; and B is an element of the transitionmetal elements of groups IIIB, IVB or VB of the periodic table.
 2. Adevice according to claim 1 wherein the second oxide layer has athickness of less than 15 nm.
 3. A device according to claim 1 whereinthe second oxide layer has a band gap of greater than about 5.5 eV.
 4. Adevice according to claim 1 wherein the second oxide layer has aconduction band offset energy of greater than 1.5 eV.
 5. A deviceaccording to claim 1 wherein the second oxide layer has an equivalentoxide thickness (EOT) of about 0.5 to about 1.6 nm.
 6. A deviceaccording to claim 1 wherein B is an element with 3d, 4d or 5d electronsavailable for bonding to oxygen, and wherein A is an element in whichone 5d electron is available for bonding.
 7. A device according to claim1, wherein B is scandium, titanium, tantalum or niobium.
 8. A deviceaccording to claim 1, wherein B is scandium, titanium, tantalum, orniobium (Nb) and wherein A is trivalent gadolinum, praseodynium orlutetium.
 9. A device according to claim 1, wherein B is scandium,titanium, tantalum or niobium and wherein A is cerium, nedoymnium,promethium, samarium, europium, terbium, dysprosium, holmium, erbium,thulium, or ytterbium.
 10. A device according to claim 1, wherein thesubstrate comprises a material selected from the group consisting of aGroup III-V binary alloy, a Group III-V quaternary alloy, a GroupIII-nitride alloy, and combinations thereof.
 11. A device according toclaim 1, wherein the substrate comprises a Group III-V binary alloyselected from the group consisting of (Ga,Al)As, (In,Ga)As, andcombinations thereof.
 12. A device according to claim 1, wherein thesubstrate comprises a Group III-V quaternary alloy comprising(Ga,In)(As,P).
 13. A device according to claim 1, wherein the substratecomprises a Group III-nitride alloy selected from the group consistingof (Ga,Al)N, (Ga,In)N, (Al,In)N, (Ga,Al,In)N, and combinations thereof.14. A device according to claim 1, wherein the substrate comprises amaterial selected from the group consisting of silicon (Si), germanium(Ge), silicon carbide (SiC), gallium nitride (GaN), gallium arsenide(GaAs), and combinations thereof.
 15. A device according to claim 1,wherein the substrate is a semiconductor-on-insulator (SOI) substrate.16. A device according to claim 1, wherein the first oxide layercomprises a nitrided silicon dioxide.
 17. A device according to claim16, wherein the first oxide layer contributes less than about 0.5 nm ofoxide-equivalent capacitance to said field effect transistor.
 18. Adevice according to claim 1, wherein the device comprises a field effecttransistor.
 19. A device according to claim 1, wherein the devicecomprises a photovoltaic device.
 20. A device according to claim 1,wherein the device comprises a high electron mobility transistor.
 21. Amethod of forming a semiconductor device comprising: providing asemiconductor substrate; forming a first oxide layer on thesemiconductor substrate. forming a second oxide layer on the first oxidelayer opposite the semiconductor substrate, the second oxide layercomprising a stoichiometric, single-phase, complex oxide represented bythe formula:A_(h)B_(j)O_(k), or equivalently (A_(m)O_(n))_(a)(B_(q)O_(r))_(b) inwhich the elemental oxide components, (A_(m)O_(n)) and (B_(q)O_(r)) arecombined so that h=j or, equivalently, ma=bq, and a, b, h, j, k, m, n, qand r are non-zero integers; and wherein: A is an element of thelanthanide rare earth elements of the periodic table or the trivalentelements from cerium to lutetium; and B is an element of the transitionmetal elements of groups IIIB, IVB or VB of the periodic table.
 22. Amethod according to claim 21, further comprising: exposing the substrateto one or more gaseous sources comprising elements A, B, and oxygen suchthat one or more gaseous sources react to form the second oxide layer.23. A method according to claim 22, wherein the one or more gaseoussources comprise an amount of oxygen sufficient to substantially oxidizeelements A and B.
 24. A method according to claim 21, wherein the stepof forming a second oxide layer is performed by a remote plasma-enhancedchemical vapor deposition process.
 25. A method according to claim 24,further comprising: exposing a gaseous source comprising oxygen and arare-gas element to radio-frequency plasma-excitation or microwavefrequency plasma-excitation; combining the gaseous source comprisingoxygen and a rare-gas element with a gaseous source comprising element Aand element B; and exposing the substrate to the combined gaseoussource.
 26. A method according to claim 25, wherein the rare gas elementis selected from the group consisting of argon and helium.
 27. A methodaccording to claim 21, wherein B is an element with 3d, 4d or 5delectrons available for bonding to oxygen, and wherein A is an elementin which one 5d electron is available for bonding as in trivalent ions.28. A method according to claim 21, wherein B is either scandium,titanium, tantalum or niobium.
 29. A method according to claim 21,wherein the step of forming a second oxide layer is performed by anatomic layer absorption process.
 30. A method according to claim 21,wherein the device comprises a field effect transistor.
 31. A methodaccording to claim 21, wherein the device comprises a photovoltaicdevice.
 32. A method according to claim 21, wherein the device comprisesa high electron mobility transistor.